NXP Semiconductors /MIMXRT1064 /IOMUXC /SW_MUX_CTL_PAD_GPIO_AD_B0_12

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Interpret as SW_MUX_CTL_PAD_GPIO_AD_B0_12

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALT0)MUX_MODE 0 (DISABLED)SION

SION=DISABLED, MUX_MODE=ALT0

Description

SW_MUX_CTL_PAD_GPIO_AD_B0_12 SW MUX Control Register

Fields

MUX_MODE

MUX Mode Select Field.

0 (ALT0): Select mux mode: ALT0 mux port: LPI2C4_SCL of instance: lpi2c4

1 (ALT1): Select mux mode: ALT1 mux port: CCM_PMIC_READY of instance: ccm

2 (ALT2): Select mux mode: ALT2 mux port: LPUART1_TX of instance: lpuart1

3 (ALT3): Select mux mode: ALT3 mux port: WDOG2_WDOG_B of instance: wdog2

4 (ALT4): Select mux mode: ALT4 mux port: FLEXPWM1_PWMX02 of instance: flexpwm1

5 (ALT5): Select mux mode: ALT5 mux port: GPIO1_IO12 of instance: gpio1

6 (ALT6): Select mux mode: ALT6 mux port: ENET_1588_EVENT1_OUT of instance: enet

7 (ALT7): Select mux mode: ALT7 mux port: NMI_GLUE_NMI of instance: nmi_glue

SION

Software Input On Field.

0 (DISABLED): Input Path is determined by functionality

1 (ENABLED): Force input path of pad GPIO_AD_B0_12

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